The present invention relates to a semiconductor device and a manufacturing technique of the semiconductor device, for example, to an effective technique to be applied to a resin-sealed semiconductor device and a manufacturing technique of the resin-sealed semiconductor device.
Japanese Patent Laid-Open No. 2005-260196 (Patent Document 1) describes a technique in which a semiconductor chip is mounted over a conductive plate, the semiconductor chip and the conductive plate are coupled by a coupling member, and thereafter the semiconductor chip and the coupling member are coated with an electrical insulating coating material. In particular, Patent Document 1 describes a technique for collectively coating a plurality of semiconductor chips mounted over the conductive plate.
Japanese Patent Laid-Open No. 2003-243594 (Patent Document 2) describes a technique in which a conductor pattern is formed by applying a lithography technique and an etching technique to a metal film formed over a support substrate, and a semiconductor chip is fixed over the conductor pattern. In Patent Document 2, after that, the semiconductor chip and the conductor pattern are coupled by using a metal piece, and thereafter the semiconductor chip and the metal piece are sealed by an insulating resin.
Japanese Patent Laid-Open No. 2007-266218 (Patent Document 3) describes a technique in which a protrusion is provided on a surface of a metal plate, which is electrically coupled to a bonding pad of a semiconductor chip and which is on a side facing the bonding pad, to thereby forcibly ensure a thickness of an adhesive layer between the bonding pad and the metal plate.